Description and Technical Data:
1) Overview/Key Features
The TE0820-05-4AI21MI is a compact 4 × 5 cm MPSoC module based on the AMD Zynq™ UltraScale+™ ZU4CG device. It combines programmable logic, processing resources, high-speed interfaces, onboard memory, configuration flash, power regulation, and expansion connectivity in a small plug-on module suitable for embedded systems, industrial control, vision, communications, and high-performance FPGA applications.
- AMD Zynq UltraScale+ MPSoC with industrial-grade device rating
- 2 GByte DDR4 SDRAM
- 128 MByte QSPI boot flash in dual-parallel mode
- 8 GByte eMMC memory
- Onboard Lattice MachXO2 CPLD
- Programmable quad-PLL clock generator for PS-GTR clocking
- High-speed USB 2.0 ULPI transceiver with OTG support
- 4 user LEDs
- 132 HP PL I/Os and 14 PS MIOs
- 4 PS-GTR serial transceiver interfaces
- PCI Express 2.1, SATA 3.1, DisplayPort, USB 3.0, and serial GMII support
- Onboard switching regulators for the required supply voltages
- High-speed Razor Beam connectors for carrier-board integration
- Module supplied without a Gigabit Ethernet PHY
NCNR non cancelable - non returnable product. B2B customers please contact Mirifica Industrial for volume quotes. Mirifica Industrial ships world-wide.
2) Tech Specs
| Specification | Detail |
|---|---|
| MPSoC device | AMD Zynq UltraScale+ XCZU4CG-1SFVC784I |
| Device speed grade | -1 |
| Device temperature grade | Industrial |
| Package | SFVC784 |
| Module type | MPSoC plug-on module |
| Module dimensions | 4 × 5 cm |
| DDR4 SDRAM | 2 GByte |
| QSPI boot flash | 128 MByte, dual-parallel mode |
| eMMC memory | 8 GByte |
| Configuration and control logic | Onboard Lattice MachXO2 CPLD |
| Clock generation | Programmable quad-PLL clock generator for PS-GTR clocking |
| USB transceiver | High-speed USB 2.0 ULPI transceiver with full OTG support |
| LEDs | 4 onboard LEDs |
| High-performance programmable-logic I/O | 132 HP PL I/Os across 3 rows |
| Processor-system I/O | 14 PS MIOs; 6 MIOs are assigned to the SD-card interface in the standard configuration |
| PS-GTR transceivers | 4 serial PS-GTR transceiver receivers |
| PCI Express | Version 2.1-compatible interface |
| SATA | SATA 3.1-compliant interface |
| DisplayPort | Source-only interface supporting resolutions up to 4K × 2K |
| USB 3.0 | Compliant interface with a line rate of 5 Gbit/s |
| Serial GMII | 1 Gbit/s serial GMII interface |
| High-speed connectors | 2 × 100-pin and 1 × 60-pin Razor Beam hermaphroditic connectors |
| Connector pitch | 4 mm standard |
| Power circuitry | Onboard switching regulators for all required supply voltages |
| Ethernet PHY | Not included |
3) Tech Support/Dokuments
Development support is available through compatible carrier boards, online documentation, design-support files, and reference designs with source code. The module is intended for integration with a suitable 4 × 5 cm carrier board using its high-speed Razor Beam connectors.
Recommended development software includes the free Vivado Standard Edition for supported FPGA design and development workflows. Users should also consult the module documentation, carrier-board documentation, pin assignments, schematics, and applicable product-change documentation before beginning a new design.
4) Related Product Suggestion
Suggested successor: TE0820-05-4AI51QI.
This successor is identified for the TE0820-05-4AI21MI product family and may be a more appropriate option for new designs. Before substitution, compare the device configuration, memory, interfaces, pin compatibility, carrier-board requirements, and software support with the requirements of the intended application.
5) Downloads/Links
- Product page: TE0820-05-4AI21MI
- TE0820 Wiki documentation and design-support files
- TE0820 reference designs and source files
- Applicable Product Change Notification documentation
- Vivado Standard Edition development software
- Compatible 4 × 5 cm carrier-board documentation
6) What is in the package
- 1 × TE0820-05-4AI21MI MPSoC module with AMD Zynq UltraScale+ ZU4CG
- 8 × screws
- 4 × spacers